/Hybrid Bonding with Alternative Metals

Hybrid Bonding with Alternative Metals

Leuven | More than two weeks ago

hybrid bonding technology to enable the next-generation semiconductor devices

We are looking for a motivated PhD candidate to join our research team and contribute to the advancement of hybrid bonding technology to enable the next-generation semiconductor devices. 

Low-distortion dielectric bonding has already become an established solution in front-end-of-line (FEOL) processing. However, as device dimensions continue to shrink and novel architectures such as complementary FETs (CFETs) emerge, hybrid bonding is gaining increasing relevance even within FEOL integration schemes. In this context, the limitations of copper (Cu) as the standard interconnect material become apparent. Shrinking interconnect pitches and compatibility constraints necessitate the exploration of alternative metals that can meet the stringent requirements of future semiconductor nodes. 

 

Your role 
As a PhD candidate, you will play a central role in shaping this research, with responsibilities including: 

  • Identifying and screening promising alternative metals for hybrid bonding. 

  • Characterizing their physical (e.g. grain structure), chemical, and electrical properties at the nanoscale. 

  • Designing and performing experimental bonding studies to evaluate integration feasibility. 

  • Developing a fundamental understanding of the mechanisms that govern bonding with these metals. 

  • Collaborating with experts in materials science, process integration, and semiconductor technology. 

 

Impact 
This research will directly contribute to overcoming critical bottlenecks in advanced semiconductor manufacturing. By enabling new interconnect materials and bonding strategies, you will help to pave the way toward more reliable, energy-efficient, and scalable integration schemes. 



Required background: engineering/physics/chemistry

Type of work: 60% experimental 30% data analysis 10% literature

Supervisor: Stefan De Gendt

Daily advisor: Serena Iacovo

The reference code for this position is 2026-140. Mention this reference code on your application form.

Who we are
Accept marketing-cookies to view this content.
Cookie settings
imec inside out
Accept marketing-cookies to view this content.
Cookie settings

Related jobs

Chemically-tuned 2D materials for next-generation nanoelectronics using first-principles quantum transport modeling

Explore chemically-tuned 2D materials for future nanoscale devices using state-of-the-art atomistic quantum-transport techniques

[NanoIC topic] Mathematical Statistical methods for ML algorithms for EUVL

Build up Mathematical Statistical innovative methods to create Machine Learning algorithms and models, tuned to accurately predict and automate characterization of defect-limiting, stochastic-induced, effects on device performance (yield), explicit to massive EUV-patterning proce

[NanoIC topic] Sustainable Design-Technology Co-Optimization for Advanced Technologies

Enabling the transition from PPA(C) to PPACE for the exploration of advanced technologies, such as CFET, 2D, and IGZO, taking into account the cost and environmental cost linked to integration and process assumptions.

Impact of moisture on the reliability of 3-D & OIO technologies

Moisture in microelectronics: myths or risk?

Design enablement, characterization & technology/system architecture tuning for CMOS2.0

Design enablement, characterization & technology/system architecture tuning for multi-layered integrated circuits (part of CMOS2.0_HW_SW topic)

Multiscale Thermal Investigations of High Thermal Conductivity Heat Spreaders for Advanced Microelectronic Packages

This research will contribute to the development of scalable thermal solutions for future high-performance computing and AI hardware, where thermal bottlenecks increasingly limit reliability and speed.
Job opportunities

Send this job to your email