Custom chip manufacturing
Go from idea to scalable and reliable semiconductor manufacturing with IC-Link.
IC-Link provides customized solutions for innovative chip manufacturing, built on imec’s semiconductor expertise. Next to silicon production, the division includes services spanning from design through packaging, assembly, qualification, and supply chain management.
Technologies range from ASICs in CMOS, including the most advanced commercially available nodes, to imec-developed integrated photonics, custom wafer processes, and 2.5D and 3D packaging. This portfolio continually expands with new platforms fresh from R&D once they are commercially validated.
ASIC services
A custom ASIC allows you to differentiate your product through higher performance, smaller form factor, better IP protection, and more.
IC-Link’s CMOS ASIC offering includes:
- A wide range of technology nodes down to N2
- Partnerships with commercial foundries, including TSMC as Value Chain Alliance (VCA) member
- Flexible business models including full turnkey
- Design capabilities across digital, analog and mixed signal
- Packaging solutions including 2.5D/3D design and production
- Testing development, qualification and supply chain management services to serve high-volume customers
PIC services
Differentiate your application by harnessing the high performance and low power consumption of a silicon photonics integrated circuit (PIC).
IC-Link's 200mm silicon photonics platform, iSiPP200 offering includes:
- A complete, state-of-the-art PDK, regularly updated with new advancements, coming from imec’s leading photonics research program
- Flexible volumes thanks to foundry access
- Service model to go from idea to production
- Additional photonics platforms on the roadmap
Custom wafer process services
Get access to manufacturing capabilities without a standard flow. These include:
- Custom-developed imagers and detectors, from design to production based on imec’s R&D
- Fine-resolution wafers using state-of-the-art lithography tools
- CMOS post-processing: unique capabilities that can be combined with photonics, advanced lithography, and more
Example project: From circuit design and specialty Si-processing to seeing atoms
Advanced packaging services
A broad range of mainstream to advanced packaging techniques is available through our ASIC partners. This is complemented by selected imec-developed 2.5D and 3D packaging services.
Examples include:
- 2D packaging: ball grid array (BGA), land grid array (LGA), wafer-level chip-scale packaging (WLSCP), multi-chip module (MCM), system in package (SiP)
- 2.5 packaging: via packaging partners, imec-developed solution coming in 2026
- 3D packaging: via packaging partners, imec solution under development
Press releases
12 March 2026
Leveraging European academic excellence to accelerate industrial innovation
Press releases
2 March 2026
New advanced interconnect PDKs pave the way for high‑density, energy‑efficient chip‑to‑chip integration.
Press releases
25 February 2026
The findings reveal that controlling gas composition, especially oxygen levels, during critical lithography steps dramatically optimizes metal-oxide resist performance for next-generation, high-throughput EUV patterning.
Press releases
17 February 2026
Patented linearization and switched input buffer techniques ensure precise signal conversion and wide bandwidth at high speeds.
Press releases
27 January 2026
First-of-its-kind solution for barium titanate epitaxy on silicon to accelerate datacom and quantum computing applications.
Press releases
11 December 2025
Pioneering approach makes compact, cost-effective, high-resolution multispectral shortwave infrared (SWIR) sensors accessible, enabling broad application in security, agriculture, automotive, aerospace, and more.
Press releases
10 December 2025
Collaboration with leading semiconductor manufacturers pivotal in optimizing the key modules for 2D-material device integration.
Press releases
9 December 2025
Breakthrough enables scalable, high-precision biosensing applications in life sciences and healthcare
Press releases
8 December 2025
Holistic system-technology co-optimization (STCO) approach key in reducing peak GPU and HBM temperatures under AI workloads while enhancing performance density of future GPU-based architectures
Press releases
18 November 2025
Major update of NanoIC’s Pathfinding N2 P-PDK empowers researchers and designers to learn and innovate on full SoC architectures
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