/System technology co-optimization for high speed/high frequency chiplets and heterogeneous integration packaging

System technology co-optimization for high speed/high frequency chiplets and heterogeneous integration packaging

Leuven | More than two weeks ago

Are you ready to embark on an exciting journey into the cutting-edge world of semiconductors? Today, the semiconductor industry is undergoing a profound transformation, and we invite you to be part of it.

The semiconductor industry is evolving towards a chiplet ecosystem, where large integrated circuits (ICs) are broken down into smaller, standardized functional chiplets that are reassembled at the interposer level. This approach reduces manufacturing costs by leveraging more cost-effective processes, rather than relying on the latest cutting-edge technologies. Since chiplets are often developed by different manufacturers using various technology nodes and materials, they must be integrated into a heterogeneous platform to work seamlessly together.

This PhD focuses on the co-optimization of system and technology for high-speed/high-frequency chiplets and the imec RF interposer as a heterogeneous integration platform. It aims to enable innovative system concepts and the necessary system-technology co-optimization for the next generation of wireless communications and high-speed data transmission, including optical and RF hybrid systems.

Research Goals:

  • Literature Review & Benchmarking: Investigate the latest advancements in chiplet systems, packaging technologies, and RF-optical hybrid systems.
  • Development of Low-Loss Interconnects:
    • Focus on developing novel conductors and dielectrics compatible with foundries.
    • Optimize design methodologies to reduce signal loss and enhance performance.
  • Modeling & Design of Passive Components: Design and model passive components on the RF Si interposer, optimized for the 100-300 GHz frequency range.
  • RF and Optical Integration: Enable seamless integration of RF and optical data transmission, bridging the gap between electrical and optical systems using the imec RF Si interposer to facilitate high-speed data transfer for data centers.

Research Environment:
You will collaborate with experts in 3D technology and RF design at imec, a world-class R&D center, across multiple departments and teams. Your daily advisor will be Xiao Sun, a leading scientist at imec, and your PhD will be supervised by Prof. Nadine Collaert from Vrije Universiteit Brussel (VUB).


 

Required background: Electrical Engineering, Microelectronics, RF and microwave

Type of work: 40 simulation/modeling, 20% design, 10% characterization, 10% literature

Supervisor: Nadine Collaert

Co-supervisor: Xiao Sun

Daily advisor: Xiao Sun

The reference code for this position is 2025-019. Mention this reference code on your application form.

Who we are
Accept marketing-cookies to view this content.
Cookie settings
imec inside out
Accept marketing-cookies to view this content.
Cookie settings

Related jobs

Compact modelling and calibration for imec's InP HBT technology

Create a compact model utilizing the currently available compact model setup and calibrate it to imec's HBT technology 

Extreme Ultraviolet Light Coherent Diffractive Imaging and Scatterometry for Characterization of Nanoscale Semiconductor Structures and Devices

Enhance the capabilities of extreme ultraviolet nanoscale coherent diffractive imaging and scatterometry with machine learning, advanced reconstruction and data processing algorithms to enable non-destructive imaging and characterization of complex buried semiconductor nanostruct

Millimeter-wave 3D Forward-looking Synthetic Aperture Radar Imaging: Algorithm and System design

You will bring 3D radar imaging to unprecedented levels of resolution and crispness!

Alleviating Thermal Challenges In Angstrom Nodes: Paving The Way For 3D Integrated Circuits (3D-ICs) of The Future

Ready to embark on a journey towards keeping electronics “cool”? Join us for this exciting opportunity to remove thermal bottlenecks in 3DICs to enable future technologies that have superior performance, are reliable and energy-efficient!!

Electron-beam based nanoprobing for defect analysis of nanoelectronics

Investigate electrical defects at the nanometer scale and contribute to advancing the semiconductor roadmap into the angstrom era

Configurable Logic Blocks for CMOS 2.0 FPGAs

Ready to embark on a journey towards new FPGA circuits based on multi-layer CMOS2.0 technology for future reconfigurable systems?
Job opportunities

Send this job to your email