Multi-reticle wafer-scale silicon photonics (SiPh) integration become popular due to the capability of building very-large-scale photonic integrated circuit (PIC) for wafer-level optical Interconnects and packaging, large aperture beam steering, large-scale programmable photonic mesh and so on. At the same time, silicon nitride (SiN) is regarded a better option for multi-reticle wafer-scale integration and packaging due to the lower optical loss, higher deposition rate and better integration compatibility. Normally, SiN faces process-uniformity issues in deposition, polishing, patterning and packaging process on a 300-mm large wafer. Passive components, like filters, couplers, multiplexers, are sensitive to the wafer-level process variability, may cause failures and lose money. Co-design of wafer processing and device robustness towards zero-fail SiN components can improve the feasibility of the future multi-reticle wafer-scale PIC.
Imec is working on the research and development of state-of-the-art SiPh technology, low loss SiN platform, and multi-reticle advanced patterning at imec 300-mm SiPh platforms. In this context, the objective of the Ph.D. program is to research and develop highly-reliable passive components, process optimizations to meet the needs of the future wafer-level optical I/O, LiDAR, all-optical switches, and quantum photonics applications. Prof. Wim Bogaerts will be in the role of advisor from time to time wherever needed.