Leuven | More than two weeks ago
Unravel fundamental reliability physics to enable large-scale quantum computing
Large-scale quantum computers are not only the chief contenders to break limits of CMOS scaling but also have the potential to massively boost fundamental research in fields such as cryptography, computational chemistry, and material science. Bringing the control interface close to the qubits is thereby crucial to scale the number of qubits, reducing limitations due to wiring and signal integrity. Therefore, it is necessary to develop on-chip solutions with ultra-low power consumption and optimized noise and performance figures [1].
Lowering the supply voltage for cryogenic circuits is the most common approach to lower power consumption, hence the margins for performance degradation and variability of CMOS devices at cryogenic temperatures is a topic of great interest [2], [3]. Traditional reliability models like time-dependent dielectric breakdown, bias temperature instability, and hot-carrier degradation are thought to freeze out at low temperatures. However, recent experimental studies have reported an unexpected weakening of this temperature activation in the cryogenic regime, suggesting the need for a fundamental revision and expansion of common degradation models [4], [5].
These models rely on a deep understanding of different physical phenomena, such as charge transport in semiconductors and dielectrics or microscopic mechanisms for the creation and charging kinetics of point defects. This situation is, however, even more intricate because different physical mechanisms such as band-tail carrier transport and interface disorder can dominate the device behavior at deep cryogenic temperatures (4 K down to mK). Another intriguing aspect of operating at such low temperatures is that the increased energy selectivity in this regime can potentially also be used to gain valuable insights in the microscopic nature of defects.
[1] X. Xue et al., doi: 10.1038/s41586-021-03469-4.
[2] A. Grill et al., doi: 10.1109/EDTM55494.2023.10102937.
[3] A. Grill et al., doi: 10.1109/IRPS45951.2020.9128316.
[4] J. Michl et al., doi: 10.1109/TED.2021.3116931.
[5] R. Asanovski et al., doi: 10.1109/TED.2022.3233551.
What you will do:
Who you are:
Figure 1: Left: Quantum mechanical formulation of the non-radiative multi phonon model to explain oxide defect kinetics at 4K. Right: Simulation results vs. measurement data for threshold voltage drift as function of temperature and stress time.
Required background: solid-state physics, semiconductor (device) physics, electrical engineering, microelectronics, computational physics, or related fields
Type of work: 40% electrical measurements or simulations of CMOS devices at various temperatures, 40% data analysis and modeling, 20% literature research
Supervisor: Michel Houssa
Co-supervisor: Stanislav Tyaginov
Daily advisor: Alexander Grill
The reference code for this position is 2025-076. Mention this reference code on your application form.