Stories

As AI workloads drive a steep increase in memory capacity, imec explores ferroelectric memory technologies to address the cost and density constraints of classical DRAM.

The new integration approach implements sub-100nm self-aligned through-Si via connections, enabling low-resistance and low-leakage front-to-back connections with good overlay performance 

Novel 300mm integration approach for 2D-material based devices enables scaled n and pFETs with 50nm contacted poly pitch

Building on this, imec further demonstrates the first full transceiver architecture compliant with IEEE 802.15.4ab, delivering up to a 32x improvement in ranging performance through combined receiver, transmitter, and IEEE 802.15.4ab standard innovations

Through their continued collaboration, imec and EV Group (EVG) are focusing on advancing the overlay performance required for advanced logic-to-logic and memory-to-logic tier stacking.

Imec broadens its Automotive Chiplet Program (ACP) into Autonomous Edge Chiplet Program (AECP)