Automotive chiplet program
Chiplet architectures will drive high-performance computing in software-defined vehicles. Imec and its partners prepare this shift through reference architectures and physical testbeds.
Automotive semiconductor technologies are crucial to making mobility more sustainable, safe, and affordable. Silicon performance is rapidly replacing horsepower as the foremost differentiator between car models.
The compute performance needed to drive next-generation ADAS/AD and in-vehicle infotainment (IVI) is immense. Soon, every car will need a supercomputer on board, which cannot solely run on chips that rely on monolithic IC design.
Chiplet architectures, combining chips designed to perform specific functions efficiently, will allow car OEMs to aim for cost-effective systems tailored to the demands of various applications. And quickly adapt those systems across car models and model generations by swapping chiplets, not unlike LEGO blocks.
Why are chiplets attracting the attention of the automotive industry?
Paving the way for automotive chiplets
Chiplets are already used in high-performance computing, servers and consumer devices. However, the higher quality and reliability (QnR) requirements in the automotive industry elevate complexity and necessitate novel solutions from the architecture down to the level of materials.
Furthermore, an open automotive chiplet ecosystem with a high level of interface standardization and agreed-upon architecture blueprints across the industry is imperative to ensure interoperability, compatibility, and scalability – resulting in more flexibility regarding chip architectures and a reduced time-to-market for OEMs.
Imec plays a leading role in this standardization effort by bringing together leading players from the automotive ecosystem in the Automotive Chiplet Forum.
At the same time, the automotive chiplet program aims at accelerating and derisking chiplet adoption for contributing partners through pre-competitive research that leverages imec’s infrastructure and expertise.
This research program comprises two tracks: the investigation of interconnect QnR and the development of a reference architecture.
Track 1: reference architectures
The first step is to develop digital models of chiplet architectures geared to the system-level needs of the automotive industry. These reference architectures will be used to create physical models in track 2, and they offer the OEMs valuable insights for early software development.
Track 2: interconnect QnR
Which chiplet interconnect technologies will meet the stringent automotive requirements regarding temperature cycles, vibrations, and so on (AEC-Q100 grade 2 at 10 DRM)? Imec’s automotive chiplet program tackles this question by building physical test structures inspired by the research from track 1 and based on the PTCQ chips developed in imec’s 3D integration research program.
These thermo-mechanical testbeds mimic real physical architectures and internal thermal load conditions, and allow ACQ-100 testing. The resulting insights into the most appropriate interconnect technologies for automotive chiplets will be shared with all program partners.
Work with us
Imec’s precompetitive automotive chiplet program is geared to a wide range of actors in the ecosystem, from OEMs, foundries and IDMs to automotive chiplet vendors. By tapping into imec’s unparalleled expertise in semiconductor scaling, 3D integration, and HPC modeling, all partners lay the groundwork for a rapid, de-risked adoption of chiplets in their future products.
In bilateral projects, imec is also ready to bridge the results from our R&D program towards the next step, which is to productize a specific chiplet-based solution through imec.IC-link.
Want to join imec’s automotive chiplet program or talk about your automotive computing challenge?
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This research is partially funded by the State of Michigan.
